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> Macraigor wiggler arm jtag adapter-programmer&debugger
Macraigor wiggler arm jtag adapter-programmer&debugger
Macraigor wiggler arm jtag adapter-programmer&debugger
ARM-JTAG Wiggler adapter-programmer and debugger
The ARM JTAG Wiggler is a parallel port JTAG programming adapter with LPT port cable, JTAG20 cable and cross-connection board.
The JTAG Wiggler connect to PC through parallel port and draws power for target board over the voltage range 2.7-5.5VDC. The ARM JTAG buffers the JTAG signal lines from the PC’s parallel port to allow target voltage levels to vary over the common range. ARM JTAG Wiggler may be used with a variety of third party software tools and open source JTAG tools.
ARM JTAG Wiggler compatible with Rowley's CrossWorks, IAR EWARM and GCC (OCD) for programming and on-chip debugging.
The item is delivered in a complete set (Parallel port cable, ARM JTAG Wiggler, JTAG cable, cross-board) necessary for simple start.
* program Philips LPC family, ATMEL ARM and other (tested with LPC21xx, ATMEL AT91SAMxx) ARM flash microcontrollers
* uses ARM standard 2x10 pin JTAG connector
* no need for external power supply, all power is taken from the target board
* compatible with Rowley's CrossWorks, IAR EWARM and GCC (OCD) software for programming, real time emulation, debugging, step by step program execution, breakpoints, memory dump
* High-quality PCB with green mask
* dimensions 50x50 mm (2x2") + 25 cm (8") cable
JTAG signals description (BH-20 to IDC-20 connector):
1 (VCC) Target voltage sense. Used to indicate the target’s operating voltage to the debug tool.
3 (nTRST) JTAG TAP reset, this signal should be pulled up to Vcc in target board.
4,6, 8, 10,12,14,16,18,20 Ground. The Gnd-Signal-Gnd-Signal strategy implemented on the
20-way connection scheme improves noise immunity on the target connect cable.
5 (TDI) JTAG serial data in, should be pulled up to Vcc on target board.
7 (TMS) JTAG TAP Mode Select, should be pulled up to Vcc on target board.
11 (RTCK) JTAG retimed clock. Implemented on certain ASIC ARM implementations the host ASIC may need to synchronize external inputs (such as JTAG inputs) with its own internal clock.
13 (TDO) JTAG serial data out.
15 (nSRST) Target system reset.
17 (DBGRQ) Asynchronous debug request. DBGRQ allows an external signal to force the ARM core into debug mode, should be pull down to GND.
19 (DBGACK) Debug acknowledge. The ARM core acknowledges debug-mode in response to a DBGRQ input.
But many developers use own arrangement of contacts of a socket or other type of a socket. It causes some inconveniences at use standard JTAG debuggers. Delivered with JTAG Wiggler cross-board allows to eliminate these inconveniences. Now you can connect JTAG with individually identified wire strand flyleads, that connected to your target board and to cross-board.
Product List - all for simple getting started with ARM JTAG Wiggler:
3. JTAG 20-pin cable for connect target board to JTAG
4. Cross-board with marked signal pins (TDI, TMS and other)
2) Bank transfer (bank account in Germany)
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Attenzione, si avvertono gli eventuali compratori italiani, che al recapito del pacco, si dovranno pagare altri 8..13,44 EURO di spese doganali.
Temporary Email: Ingrid.martinez@dontscrapit.com (Ingrid Martinez)
